Maryam Cope
Director, Government Affairs
Semiconductor Industry Association
Maryam Cope is director of government affairs at SIA. In this role, Maryam works closely with industry, Congress, and the Administration to advance key legislative and regulatory priorities related to semiconductor research and technology, high-skilled immigration, and product security. Maryam brings over a decade of technology policy and advocacy experience to SIA. Prior to SIA, she was managing partner for the technology practice at GoldsteinCope Policy Solutions. She also established the technology policy practice at the American Hotel & Lodging Association. Maryam also worked at the Information Technology Industry Council, where she led advocacy efforts in the areas of cybersecurity, encryption, and supply chain security.
Dr. Todd Younkin
President & CEO
Semiconductor Research Corporation
Dr. Todd Younkin is a talented and seasoned executive with more than 20 years of experience in technology innovation. Dr. Younkin’s extensive Research and Development experience spans Intel’s 0.18um to 5nm nodes with technical contributions in novel materials, nanotechnology, integration, advanced lithography, and integrated photonics. Most recently, Dr. Younkin engineered, launched, and led all programmatic aspects of the five-year, $240 million JUMP research initiative. It has six multi-university, multi-disciplinary innovation Centers with 133 faculty, 835 students, and 360 industrial engineering liaisons. It emphasizes the advancement of Computer Science, Electrical Engineering, and Materials to secure continued U.S. thought leadership.
Victor V. Zhirnov, Ph.D.
Chief Scientist
Semiconductor Research Corporation
Victor Zhirnov is Chief Scientist at the Semiconductor Research Corporation. He is responsible
for envisioning new long-term research directions in semiconductor information and communication technologies for industry and academia .His semiconductor experience spans over 30 years in the areas of materials, processes, devices physics and fundamental limits.
Victor received the M.S. in applied physics from the Ural Polytechnic Institute, Ekaterinburg, Russia, and the Ph.D. in solid state electronics and microelectronics from the Institute of Physics and Technology, Moscow, in 1989 and 1992, respectively. He has authored and co-authored over 150 technical papers and contributions to books.
Jim Wieser
Director of University Research and Technology
Texas Instruments
Jim serves Texas Instruments as Director of University Research and Technology within the university relations organization in close collaboration with the CTO Office. In this role he identifies and drives strategic technology initiatives, research strategy and aligns university research to the needs of the company. His semiconductor experience spans over 40 years in the areas of design, product development management and technologist. He is an IEEE Senior Member and SRC Executive Technical Advisory Board member for TI.
Sean Eilert
Fellow, Emerging Memory & Memory System Optimization Technology Pathfinding Group
Micron
Sean Eilert is a Micron Fellow in the Technology Pathfinding Group performing research at the intersection of emerging memories and the systems that will utilize them. Sean has held numerous engineering development roles ranging from test development, reliability, media management, design, architecture, system architecture, system design and system characterization. Sean’s interests lie in memory architectures, system architectures, and the interactions between them with special interest in media management and in-memory compute. An innovator by nature, Sean holds over 40 memory, compute-in-memory and system-related patents.
Ramesh Chauhan
Principal Engineer
Qualcomm
Ramesh Chauhan is a Principal engineer at Qualcomm Technology Incorporated in Corporate Research & Development division. In R&D his focus is on SoC Architecture research involving ML HW accelerator development, processor development, and architecture power and performance analysis. Ramesh was previously involved in various aspects of SoC development including validation and design methodology development in the areas of Modem, Multi-media and Security. He hold Bachelor’s and Master’s degrees from Birla Institute of Tech & Science, Pilani (India) in Electrical & Electronics and Mathematics.
Debra Delise
General Manager, Security Center of Excellence
Analog Devices
Debra Delise is a seasoned technology leader, with experiences ranging from analyzing Space Shuttle flights and developing precision navigation systems for aircraft to designing security solutions for airports and microelectronics. Throughout her career, Debra’s focus has been to successfully balance business results and innovation achievement with the development of empowered, energized teams.
Debra is currently the General Manager of Analog Device’s Security Center of Excellence, reporting to the Chief Technology Officer. Analog Devices (NASDAQ: ADI) solves the world’s toughest challenges by intelligently bridging the gap between the digital and the physical in ways never before possible. In her role, Debra leads the team responsible for developing and deploying security solutions across the breadth of ADI’s product portfolio as the “intelligent edge” emerges.
Gilroy Vandentop
Director of Corporate University Research
Intel
Gilroy Vandentop is the Director of Corporate University Research, within Intel Labs. His team manages Intel’s university research investments for key internal technology and business customers. Gilroy is also on the board of the Semiconductor Research Corporation, an industry wide consortium. He managed the SRC STARnet program and is currently chair for the Governing Council of the JUMP/nCORE program.
Gilroy moved to Intel Labs from TMG’s Components Research group in 2015. While in Components Research, he formed the Novel Materials group and managed Intel’s EUV program through transfer into technology development. From 2000 to 2006, he was responsible for the Packaging Research group in Chandler, AZ. During his first 10 years at Intel, Gilroy worked in Logic Technology Development on silicon process development in the etch and photolithography areas.
Jim Ang
Chief Scientist for Computing in the Physical and Computational Sciences Directorate
PNNL
James (Jim) Ang serves as the Pacific Northwest National Laboratory (PNNL) sector lead for the U.S. DOE Office of Science, Advanced Scientific Computing Research (ASCR) Program. Dr. Ang established and leads PNNL’s Data-Model Convergence (DMC) Initiative which directly supports lab objectives in accelerating scientific discovery and real time control of the power grid. The DMC Initiative is pursuing a hardware-software co-design approach to support converged workloads that arise from the integration of physical science, e.g., high performance computing simulations and experimental measurements, and data science, e.g., AI/ML and data/graph analytics.
